Hierarchal Computer Modeling of Semiconductor Devices

Kevin F. Brennan
School of Electrical and Computer Engineering
Georgia Institute of Technology
Atlanta, Georgia

A hierarchal scheme of semiconductor device modeling techniques was presented. An example set of semiconductor device models from a microscopic, highly physics-intensive model to a macroscopic, engineering based, terminal characteristics model was presented. The range of applicability of each model, the salient details of how each of these modeling techniques works, how these different models can be used synergistically to develop a full range of modeling capability, and examples of their usage were presented. Comparison of the models to experimental measured devices was also discussed.