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Tutorial Details: Introduction to Koronis

Date: Thursday, June 16, 2011, 01:00 pm - 03:00 pm
Location: 575 Walter
Instructor(s): David H Porter, MSI, Shuxia Zhang, MSI

MSI's addition of Koronis introduces a unique large shared-memory architecture and GPU capabilities to the Institute. The Koronis computing system includes a UV1000 with 1,140 cores, all of which can address a common 2.86 TiB of system memory. This tutorial will give an overview of the queuing system and available compiling tools as well as the use of CPUset and run-time variables for maximizing performance. We will specifically address the strengths of, and special considerations needed for, the 6-core Xeon X7542 "Westmere" processors and the larger shared memory available on the UV1000. This tutorial will also cover Koronis's developmental and GPU computing UV100s, along with the interactive visualization capabilities on Koronis's UV10s.

Level: Introductory
Prerequisites: None